インテル® Fortran コンパイラー 19.0 デベロッパー・ガイドおよびリファレンス

Compiler Directives

The following tables list available compiler directives.

Each general directive name is preceded by the prefix cDIR$ (or cDEC$), where c is one of the following: !, C (or c), or *; for example, !DIR$ ALIAS).

Each OFFLOAD directive name is preceded by the prefix cDIR$, where c is one of the following: !, C (or c), or *; for example, !DIR$ OFFLOAD_TRANSFER.

Each OpenMP* Fortran directive name is preceded by the prefix c$OMP, where c is one of the following: !, C (or c), or *; for example, !$OMP ATOMIC.

Compiler directives are specially formatted comments in the source file which provide information to the compiler. Some directives, such as line length or conditional compilation directives provide the compiler information which is used in interpreting the source file. Other directives, such as optimization directives provide hints or suggestions to the compiler, which, in some cases, may be ignored or overridden by the compiler based on the heuristics of the optimizer and/or code generator. If the directive is ignored by the compiler, no diagnostic message is issued.

You do not need to specify a compiler option to enable general directives.

Some directives may perform differently on Intel® microprocessors than on non-Intel microprocessors.

General Directives

Name

Description

ALIAS

Specifies an alternate external name to be used when referring to an external subprogram.

ASSUME

Provides heuristic information to the compiler optimizer.

ASSUME_ALIGNED

Specifies that an entity in memory is aligned.

ATTRIBUTES

Applies attributes to variables and procedures.

BLOCK_LOOP

Enables loop blocking for the immediately following nested DO loops.

DECLARE

Generates warning messages for undeclared variables.

DEFINE

Creates a variable whose existence can be tested during conditional compilation.

DISTRIBUTE POINT

Suggests a location at which a DO loop may be split.

ELSE

Marks the beginning of an alternative conditional-compilation block to an IF directive construct.

ELSEIF

Marks the beginning of an alternative conditional-compilation block to an IF directive construct.

ENDIF

Marks the end of a conditional-compilation block.

FIXEDFORMLINESIZE

Sets fixed-form line length. This directive has no effect on freeform code.

FMA

Tells the compiler to allow generation of fused multiply-add (FMA) instructions, also known as floating-point contractions.

FORCEINLINE

Specifies that a routine should be inlined whenever the compiler can do so.

FREEFORM

Uses freeform format for source code.

IDENT

Specifies an identifier for an object module.

IF

Marks the beginning of a conditional-compilation block.

IF DEFINED

Marks the beginning of a conditional-compilation block.

INLINE

Specifies that the routines can be inlined.

INTEGER

Selects default integer size.

IVDEP

Assists the compiler's dependence analysis of iterative DO loops.

LOOP COUNT

Specifies the typical trip loop count for a DO loop; this assists the optimizer.

MESSAGE

Sends a character string to the standard output device.

NOBLOCK_LOOP

Disables loop blocking for the immediately following nested DO loops.

NODECLARE

(Default) Turns off warning messages for undeclared variables.

NOFMA

Disables the generation of FMA instructions.

NOFREEFORM

(Default) Uses standard FORTRAN 77 code formatting column rules.

NOFUSION

Prevents a loop from fusing with adjacent loops.

NOINLINE

Specifies that a routine should not be inlined.

NOPARALLEL

Disables auto-parallelization for an immediately following DO loop.

NOOPTIMIZE

Disables optimizations for the program unit.

NOPREFETCH

Disables a data prefetch from memory.

NOSTRICT

(Default) Disables a previous STRICT directive.

NOUNROLL

Disables the unrolling of a DO loop.

NOUNROLL_AND_JAM

Disables loop unrolling and jamming.

NOVECTOR

Disables vectorization of a DO loop.

OBJCOMMENT

Specifies a library search path in an object file.

OPTIMIZE

Enables optimizations for the program unit.

OPTIONS

Controls whether fields in records and data items in common blocks are naturally aligned or packed on arbitrary byte boundaries.

PACK

Specifies the memory alignment of derived-type items.

PARALLEL

Helps auto-parallelization by assisting the compiler's dependence analysis of an immediately following DO loop.

PREFETCH

Hints to the compiler to prefetch data from memory.

PSECT

Modifies certain characteristics of a common block.

REAL

Selects default real size.

SIMD

Requires and controls SIMD vectorization of loops.

STRICT

Disables Intel® Fortran features not in the language standard specified on the command line.

UNDEFINE

Removes a symbolic variable name created with the DEFINE directive.

UNROLL

Tells the compiler's optimizer how many times to unroll a DO loop.

UNROLL_AND_JAM

Enables loop unrolling and jamming.

VECTOR

Overrides default heuristics for vectorization of DO loops.

OFFLOAD Directives

Name

Description

OFFLOAD

Enables statements to execute on the target.

OFFLOAD BEGIN and END OFFLOAD

Enables a group of statements to execute on the target.

OFFLOAD_TRANSFER

Initiates asynchronous data transfer, or initiates and completes synchronous data transfer.

OFFLOAD_WAIT

Specifies a wait for a previously initiated asynchronous activity.

OpenMP directives are specially formatted Fortran comment lines embedded in the source file that provide the compiler with hints and suggestions for parallelization, optimization, vectorization and offloading code to accelerator hardware. The compiler uses the information specified in the directives with compiler heuristic algorithms to generate more efficient code. At times, these heuristics may choose to ignore or override the information provided by a directive. If the directive is ignored by the compiler, no diagnostic message is issued.

To use the following directives, you must specify compiler option [q or Q]openmp. For more information, refer to the option description in the Compiler Options reference.

OpenMP* Fortran Directives

Name

Description

ATOMIC

Specifies that a specific memory location is to be updated atomically.

BARRIER

Synchronizes all the threads in a team.

CANCEL

Requests cancellation of the innermost enclosing region of the type specified, and causes the encountering implicit or explicit task to proceed to the end of the canceled construct.

CANCELLATION POINT

Defines a point at which implicit or explicit tasks check to see if cancellation has been requested for the innermost enclosing region of the type specified.

CRITICAL

Restricts access for a block of code to only one thread at a time.

DECLARE REDUCTION

Declares a user defined reduction for one or more types.

DECLARE SIMD

Generates a SIMD procedure.

DECLARE TARGET

Specifies that named variables, common blocks, functions, and subroutines are mapped to a device.

DISTRIBUTE

Specifies that loop iterations will be executed by thread teams in the context of their implicit tasks.

DISTRIBUTE PARALLEL DO

Specifies a loop that can be executed in parallel by multiple threads that are members of multiple teams.

DISTRIBUTE PARALLEL DO SIMD

Specifies a loop that will be executed in parallel by multiple threads that are members of multiple teams. It will be executed concurrently using SIMD instructions.

DISTRIBUTE SIMD

Specifies a loop that will be distributed across the master threads of the teams region. It will be executed concurrently using SIMD instructions.

DO

Specifies that the iterations of the immediately following DO loop must be executed in parallel.

DO SIMD

Specifies a loop that can be executed concurrently using SIMD instructions.

FLUSH

Specifies synchronization points where the implementation must have a consistent view of memory.

MASTER

Specifies a block of code to be executed by the master thread of the team.

ORDERED

Specifies a block of code to be executed sequentially.

PARALLEL

Defines a parallel region.

PARALLEL DO

Defines a parallel region that contains a single DO directive.

PARALLEL DO SIMD

Specifies a loop that can be executed concurrently using SIMD instructions. It provides a shortcut for specifying a PARALLEL construct containing one SIMD loop construct and no other statement.

PARALLEL SECTIONS

Defines a parallel region that contains SECTIONS directives.

PARALLEL WORKSHARE

Defines a parallel region that contains a single WORKSHARE directive.

SECTION

Appears within a SECTIONS directive construct to indicate a block (section) of code. It is optional for the first block of code within the SECTIONS directive construct.

SECTIONS

Specifies a block of code to be divided among threads in a team (a worksharing area).

SIMD

Requires and controls SIMD vectorization of loops.

SINGLE

Specifies a block of code to be executed by only one thread in a team.

TARGET

Creates a device data environment and executes the construct on the same device.

TARGET DATA

Creates a device data environment for the extent of the region.

TARGET ENTER DATA

Specifies that variables are mapped to a device data environment.

TARGET EXIT DATA

Specifies that variables are unmapped from a device data environment.

TARGET PARALLEL

Creates a device data environment in a parallel region and executes the construct on that device. This directive only applies when targeting Intel® Xeon Phi™ products.

TARGET PARALLEL DO

Provides an abbreviated way to specify a TARGET directive containing a PARALLEL DO directive and no other statements.

TARGET PARALLEL DO SIMD

Specifies a TARGET construct that contains a PARALLEL DO SIMD construct and no other statement.

TARGET SIMD

Specifies a TARGET construct that contains a SIMD construct and no other statement.

TARGET TEAMS

Creates a device data environment and executes the construct on the same device. It also creates a league of thread teams with the master thread in each team executing the structured block. This directive only applies when targeting Intel® Xeon Phi™ products.

TARGET TEAMS DISTRIBUTE

Creates a device data environment and executes the construct on the same device. It also specifies that loop iterations will be shared among the master threads of all thread teams in a league created by a TEAMS construct. This directive only applies when targeting Intel® Xeon Phi™ products.

TARGET TEAMS DISTRIBUTE PARALLEL DO

Creates a device data environment and then executes the construct on that device. It also specifies a loop that can be executed in parallel by multiple threads that are members of multiple teams created by a TEAMS construct. This directive only applies when targeting Intel® Xeon Phi™ products.

TARGET TEAMS DISTRIBUTE PARALLEL DO SIMD

Creates a device data environment and then executes the construct on that device. It also specifies a loop that can be executed in parallel by multiple threads that are members of multiple teams created by a TEAMS construct. The loop will be distributed across the teams, which will be executed concurrently using SIMD instructions. This directive only applies when targeting Intel® Xeon Phi™ products.

TARGET TEAMS DISTRIBUTE SIMD

Creates a device data environment and executes the construct on the same device. It also specifies that loop iterations will be shared among the master threads of all thread teams in a league created by a teams construct. It will be executed concurrently using SIMD instructions. This directive only applies when targeting Intel® Xeon Phi™ products.

TARGET UPDATE

Makes the list items in the device data environment consistent with their corresponding original list items.

TASK

Defines a task region.

TASKGROUP

Specifies a wait for the completion of all child tasks of the current task and all of their descendant tasks.

TASKLOOP

Specifies that the iterations of one or more associated DO loops should be executed in parallel using OpenMP* tasks. The iterations are distributed across tasks that are created by the construct and scheduled to be executed.

TASKLOOP SIMD

Specifies a loop that can be executed concurrently using SIMD instructions and that those iterations will also be executed in parallel using OpenMP* tasks.

TASKWAIT

Specifies a wait on the completion of child tasks generated since the beginning of the current task.

TASKYIELD

Specifies that the current task can be suspended in favor of execution of a different task.

TEAMS DISTRIBUTE

Creates a league of thread teams to execute a structured block in the master thread of each team. It also specifies that loop iterations will be shared among the master threads of all thread teams in a league created by a TEAMS construct.

TEAMS DISTRIBUTE PARALLEL DO

Creates a league of thread teams to execute a structured block in the master thread of each team. It also specifies a loop that can be executed in parallel by multiple threads that are members of multiple teams.

TEAMS DISTRIBUTE PARALLEL DO SIMD

Creates a league of thread teams to execute a structured block in the master thread of each team. It also specifies a loop that can be executed in parallel by multiple threads that are members of multiple teams. The loop will be distributed across the master threads of the teams region, which will be executed concurrently using SIMD instructions.

TEAMS DISTRIBUTE SIMD

Creates a league of thread teams to execute the structured block in the master thread of each team. It also specifies a loop that will be distributed across the master threads of the teams region. The loop will be executed concurrently using SIMD instructions.

THREADPRIVATE

Makes named common blocks private to a thread but global within the thread.

WORKSHARE

Divides the work of executing a block of statements or constructs into separate units.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

See Also